Info: Importing module top_module
Info: Rule checker, verifying imported design
Info: Checksum: 0x7a5929f2

Info: constrained 'PIN_1' to bel 'X4/Y33/io0'
Info: constrained 'PIN_2' to bel 'X2/Y33/io1'
Info: constrained 'PIN_3' to bel 'X0/Y28/io1'
Info: constrained 'PIN_4' to bel 'X0/Y30/io1'
Info: constrained 'PIN_5' to bel 'X0/Y28/io0'
Info: constrained 'PIN_6' to bel 'X0/Y23/io1'
Info: constrained 'PIN_7' to bel 'X0/Y20/io1'
Info: constrained 'PIN_8' to bel 'X0/Y17/io1'
Info: constrained 'PIN_9' to bel 'X0/Y20/io0'
Info: constrained 'PIN_10' to bel 'X0/Y3/io1'
Info: constrained 'PIN_11' to bel 'X3/Y0/io0'
Info: constrained 'PIN_12' to bel 'X3/Y0/io1'
Info: constrained 'PIN_13' to bel 'X0/Y3/io0'
Info: constrained 'PIN_14' to bel 'X33/Y2/io0'
Info: constrained 'PIN_15' to bel 'X33/Y6/io0'
Info: constrained 'PIN_16' to bel 'X33/Y17/io0'
Info: constrained 'PIN_17' to bel 'X33/Y21/io1'
Info: constrained 'PIN_18' to bel 'X33/Y4/io1'
Info: constrained 'PIN_19' to bel 'X30/Y33/io1'
Info: constrained 'PIN_20' to bel 'X28/Y33/io1'
Info: constrained 'PIN_21' to bel 'X25/Y33/io1'
Info: constrained 'PIN_22' to bel 'X27/Y33/io0'
Info: constrained 'PIN_23' to bel 'X24/Y33/io0'
Info: constrained 'PIN_24' to bel 'X23/Y33/io0'
Info: constrained 'SPI_SS' to bel 'X31/Y0/io1'
Info: constrained 'SPI_SCK' to bel 'X31/Y0/io0'
Info: constrained 'SPI_IO0' to bel 'X30/Y0/io0'
Info: constrained 'SPI_IO1' to bel 'X30/Y0/io1'
Info: constrained 'SPI_IO2' to bel 'X17/Y0/io0'
Info: constrained 'SPI_IO3' to bel 'X33/Y1/io0'
Info: constrained 'PIN_25' to bel 'X0/Y5/io0'
Info: constrained 'PIN_26' to bel 'X4/Y0/io1'
Info: constrained 'PIN_27' to bel 'X11/Y0/io0'
Info: constrained 'PIN_28' to bel 'X33/Y2/io1'
Info: constrained 'PIN_29' to bel 'X33/Y1/io1'
Info: constrained 'PIN_30' to bel 'X33/Y16/io1'
Info: constrained 'PIN_31' to bel 'X4/Y0/io0'
Info: constrained 'LED' to bel 'X5/Y33/io1'
Info: constrained 'USBP' to bel 'X9/Y33/io0'
Info: constrained 'USBN' to bel 'X10/Y33/io1'
Info: constrained 'USBPU' to bel 'X6/Y33/io0'
Info: constrained 'CLK' to bel 'X0/Y30/io0'

Info: Packing constants..
Info: Packing IOs..
Info: Packing LUT-FFs..
Info: Packing non-LUT FFs..
Info: Packing carries..
Info: Packing RAMs..
Info: Placing PLLs..
Info:   constrained PLL 'pll.uut' to X16/Y0/pll_3
Info: Packing special functions..
Info:   PLL 'pll.uut' has LOCK output, need to pass all outputs via LUT
Info:   constrained '$abc$44715$auto$blifparse.cc:492:parse_blif$44718_LC' to X1/Y1/lc0
Info: Promoting globals..
Info: promoting pll_clk_out (fanout 549)
Info: promoting $abc$44715$auto$rtlil.cc:1969:NotGate$44101 [reset] (fanout 139)
Info: promoting $abc$44715$auto$rtlil.cc:1969:NotGate$44099 [reset] (fanout 74)
Info: promoting $abc$44715$auto$rtlil.cc:1969:NotGate$44103 [reset] (fanout 26)
Info: promoting $abc$44715$auto$rtlil.cc:1969:NotGate$44655 [reset] (fanout 26)
Info: promoting $abc$44715$auto$dff2dffe.cc:175:make_patterns_logic$32865 [cen] (fanout 48)
Info: promoting $abc$44715$auto$dff2dffe.cc:175:make_patterns_logic$30676 [cen] (fanout 32)
Info: promoting $abc$44715$auto$dff2dffe.cc:175:make_patterns_logic$26906 [cen] (fanout 31)
Info: Constraining chains...
Info: Checksum: 0x0e76cf79

Info: Annotating ports with timing budgets for target frequency 12.00 MHz
Info: Checksum: 0x98d4c39a

Info: Device utilisation:
Info: 	         ICESTORM_LC:  1751/ 7680    22%
Info: 	        ICESTORM_RAM:     2/   32     6%
Info: 	               SB_IO:    42/  256    16%
Info: 	               SB_GB:     8/    8   100%
Info: 	        ICESTORM_PLL:     1/    2    50%
Info: 	         SB_WARMBOOT:     0/    1     0%

Info: Placed 44 cells based on constraints.
Info: Creating initial placement for remaining 1760 cells.
Info:   initial placement placed 500/1760 cells
Info:   initial placement placed 1000/1760 cells
Info:   initial placement placed 1500/1760 cells
Info:   initial placement placed 1760/1760 cells
Info: Initial placement time 1.26s
Info: Running simulated annealing placer.
Info:   at iteration #1: temp = 1.000000, timing cost = 836, wirelen = 57071
Info:   at iteration #5: temp = 0.062500, timing cost = 777, wirelen = 57077
Info:   at iteration #10: temp = 0.041006, timing cost = 718, wirelen = 53698
Info:   at iteration #15: temp = 0.031554, timing cost = 873, wirelen = 51604
Info:   at iteration #20: temp = 0.028478, timing cost = 862, wirelen = 50702
Info:   at iteration #25: temp = 0.024416, timing cost = 920, wirelen = 49394
Info:   at iteration #30: temp = 0.019887, timing cost = 732, wirelen = 48882
Info:   at iteration #35: temp = 0.017948, timing cost = 786, wirelen = 46476
Info:   at iteration #40: temp = 0.013888, timing cost = 904, wirelen = 46936
Info:   at iteration #45: temp = 0.011312, timing cost = 839, wirelen = 46502
Info:   at iteration #50: temp = 0.008753, timing cost = 744, wirelen = 47170
Info:   at iteration #55: temp = 0.007129, timing cost = 748, wirelen = 47130
Info:   at iteration #60: temp = 0.005516, timing cost = 736, wirelen = 46293
Info:   at iteration #65: temp = 0.004493, timing cost = 637, wirelen = 46893
Info:   at iteration #70: temp = 0.003660, timing cost = 848, wirelen = 45861
Info:   at iteration #75: temp = 0.002832, timing cost = 758, wirelen = 45025
Info:   at iteration #80: temp = 0.002428, timing cost = 647, wirelen = 44133
Info:   at iteration #85: temp = 0.001879, timing cost = 764, wirelen = 45018
Info:   at iteration #90: temp = 0.001530, timing cost = 631, wirelen = 44944
Info:   at iteration #95: temp = 0.001246, timing cost = 745, wirelen = 43207
Info:   at iteration #100: temp = 0.000964, timing cost = 662, wirelen = 43119
Info:   at iteration #105: temp = 0.000827, timing cost = 672, wirelen = 42867
Info:   at iteration #110: temp = 0.000709, timing cost = 662, wirelen = 40561
Info:   at iteration #115: temp = 0.000608, timing cost = 828, wirelen = 40129
Info:   at iteration #120: temp = 0.000521, timing cost = 708, wirelen = 39273
Info:   at iteration #125: temp = 0.000447, timing cost = 693, wirelen = 38665
Info:   at iteration #130: temp = 0.000403, timing cost = 600, wirelen = 36678
Info:   at iteration #135: temp = 0.000364, timing cost = 764, wirelen = 35460
Info:   at iteration #140: temp = 0.000346, timing cost = 680, wirelen = 35375
Info:   at iteration #145: temp = 0.000312, timing cost = 527, wirelen = 32865
Info:   at iteration #150: temp = 0.000282, timing cost = 545, wirelen = 31633
Info:   at iteration #155: temp = 0.000268, timing cost = 622, wirelen = 30320
Info:   at iteration #160: temp = 0.000254, timing cost = 498, wirelen = 27844
Info:   at iteration #165: temp = 0.000241, timing cost = 539, wirelen = 26083
Info:   at iteration #170: temp = 0.000229, timing cost = 410, wirelen = 25127
Info:   at iteration #175: temp = 0.000218, timing cost = 477, wirelen = 24214
Info:   at iteration #180: temp = 0.000197, timing cost = 472, wirelen = 23219
Info:   at iteration #185: temp = 0.000197, timing cost = 469, wirelen = 21774
Info:   at iteration #190: temp = 0.000177, timing cost = 486, wirelen = 20339
Info:   at iteration #195: temp = 0.000177, timing cost = 493, wirelen = 19064
Info:   at iteration #200: temp = 0.000160, timing cost = 467, wirelen = 18567
Info:   at iteration #205: temp = 0.000160, timing cost = 432, wirelen = 16637
Info: Legalising relative constraints...
Info:     moved 201 cells, 60 unplaced (after legalising chains)
Info:        average distance 1.151727
Info:        maximum distance 4.000000
Info:     moved 261 cells, 0 unplaced (after replacing ripped up cells)
Info:        average distance 1.926367
Info:        maximum distance 15.524175
Info:   at iteration #210: temp = 0.000152, timing cost = 398, wirelen = 14978
Info:   at iteration #215: temp = 0.000152, timing cost = 375, wirelen = 12555
Info:   at iteration #220: temp = 0.000152, timing cost = 364, wirelen = 11717
Info:   at iteration #225: temp = 0.000152, timing cost = 355, wirelen = 11572
Info:   at iteration #230: temp = 0.000137, timing cost = 406, wirelen = 10616
Info:   at iteration #235: temp = 0.000137, timing cost = 404, wirelen = 10203
Info:   at iteration #240: temp = 0.000124, timing cost = 352, wirelen = 9644
Info:   at iteration #245: temp = 0.000112, timing cost = 382, wirelen = 9283
Info:   at iteration #250: temp = 0.000106, timing cost = 379, wirelen = 8998
Info:   at iteration #255: temp = 0.000101, timing cost = 381, wirelen = 8524
Info:   at iteration #260: temp = 0.000096, timing cost = 361, wirelen = 7925
Info:   at iteration #265: temp = 0.000087, timing cost = 376, wirelen = 7747
Info:   at iteration #270: temp = 0.000082, timing cost = 380, wirelen = 7334
Info:   at iteration #275: temp = 0.000078, timing cost = 369, wirelen = 7062
Info:   at iteration #280: temp = 0.000070, timing cost = 368, wirelen = 6733
Info:   at iteration #285: temp = 0.000054, timing cost = 357, wirelen = 6577
Info:   at iteration #290: temp = 0.000054, timing cost = 362, wirelen = 6093
Info:   at iteration #295: temp = 0.000034, timing cost = 340, wirelen = 5903
Info:   at iteration #300: temp = 0.000022, timing cost = 347, wirelen = 5726
Info:   at iteration #305: temp = 0.000009, timing cost = 342, wirelen = 5633
Info:   at iteration #310: temp = 0.000004, timing cost = 342, wirelen = 5607
Info:   at iteration #315: temp = 0.000001, timing cost = 342, wirelen = 5603
Info:   at iteration #320: temp = 0.000000, timing cost = 345, wirelen = 5597
Info:   at iteration #325: temp = 0.000000, timing cost = 345, wirelen = 5591
Info:   at iteration #327: temp = 0.000000, timing cost = 338, wirelen = 5589 
Info: SA placement time 54.78s

Info: Max frequency for clock 'pll_clk_out_$glb_clk': 35.06 MHz (PASS at 12.00 MHz)

Info: Max delay <async>                      -> <async>                     : 2.20 ns
Info: Max delay <async>                      -> posedge pll_clk_out_$glb_clk: 20.56 ns
Info: Max delay posedge pll_clk_out_$glb_clk -> <async>                     : 10.45 ns

Info: Slack histogram:
Info:  legend: * represents 6 endpoint(s)
Info:          + represents [1,6) endpoint(s)
Info: [ 54814,  56152) |*******+
Info: [ 56152,  57490) |*******+
Info: [ 57490,  58828) | 
Info: [ 58828,  60166) | 
Info: [ 60166,  61504) | 
Info: [ 61504,  62842) |+
Info: [ 62842,  64180) |*************************+
Info: [ 64180,  65518) |**********************+
Info: [ 65518,  66856) |***********+
Info: [ 66856,  68194) |****************************+
Info: [ 68194,  69532) |********************+
Info: [ 69532,  70870) |********************+
Info: [ 70870,  72208) |*************+
Info: [ 72208,  73546) |**********************************************+
Info: [ 73546,  74884) |***************************************+
Info: [ 74884,  76222) |***************************+
Info: [ 76222,  77560) |******************+
Info: [ 77560,  78898) |**************************+
Info: [ 78898,  80236) |********************************************+
Info: [ 80236,  81574) |************************************************************ 
Info: Checksum: 0xdebe49db

Info: Routing..
Info: Setting up routing queue.
Info: Routing 5643 arcs.
Info:            |   (re-)routed arcs  |   delta    | remaining
Info:    IterCnt |  w/ripup   wo/ripup |  w/r  wo/r |      arcs
Info:       1000 |       15        984 |   15   984 |      4659
Info:       2000 |      111       1888 |   96   904 |      3769
Info:       3000 |      196       2803 |   85   915 |      2863
Info:       4000 |      358       3641 |  162   838 |      2062
Info:       5000 |      544       4455 |  186   814 |      1293
Info:       6000 |      685       5314 |  141   859 |       482
Info:       6590 |      781       5809 |   96   495 |         0
Info: Routing complete.
Info: Route time 2.41s
Info: Checksum: 0xaf98bcc0

Info: Critical path report for clock 'pll_clk_out_$glb_clk' (posedge -> posedge):
Info: curr total
Info:  0.8  0.8  Source $auto$simplemap.cc:420:simplemap_dff$17562_DFFLC.O
Info:  0.9  1.7    Net common.pb.uart_clks_per_sym[0] budget 0.000000 ns (18,13) -> (18,12)
Info:                Sink $abc$44715$auto$blifparse.cc:492:parse_blif$45755_LC.I3
Info:  0.5  2.1  Source $abc$44715$auto$blifparse.cc:492:parse_blif$45755_LC.O
Info:  0.9  3.0    Net $auto$alumacc.cc:474:replace_alu$16007.C[1] budget 0.000000 ns (18,12) -> (17,11)
Info:                Sink $nextpnr_ICESTORM_LC_3.I1
Info:  0.4  3.4  Source $nextpnr_ICESTORM_LC_3.COUT
Info:  0.0  3.4    Net $nextpnr_ICESTORM_LC_3$O budget 0.000000 ns (17,11) -> (17,11)
Info:                Sink $auto$alumacc.cc:474:replace_alu$16007.slice[1].carry$CARRY.CIN
Info:  0.2  3.6  Source $auto$alumacc.cc:474:replace_alu$16007.slice[1].carry$CARRY.COUT
Info:  0.0  3.6    Net $auto$alumacc.cc:474:replace_alu$16007.C[2] budget 0.000000 ns (17,11) -> (17,11)
Info:                Sink $auto$alumacc.cc:474:replace_alu$16007.slice[2].carry$CARRY.CIN
Info:  0.2  3.7  Source $auto$alumacc.cc:474:replace_alu$16007.slice[2].carry$CARRY.COUT
Info:  0.0  3.7    Net $auto$alumacc.cc:474:replace_alu$16007.C[3] budget 0.000000 ns (17,11) -> (17,11)
Info:                Sink $auto$alumacc.cc:474:replace_alu$16007.slice[3].carry$CARRY.CIN
Info:  0.2  3.9  Source $auto$alumacc.cc:474:replace_alu$16007.slice[3].carry$CARRY.COUT
Info:  0.0  3.9    Net $auto$alumacc.cc:474:replace_alu$16007.C[4] budget 0.000000 ns (17,11) -> (17,11)
Info:                Sink $auto$alumacc.cc:474:replace_alu$16007.slice[4].carry$CARRY.CIN
Info:  0.2  4.1  Source $auto$alumacc.cc:474:replace_alu$16007.slice[4].carry$CARRY.COUT
Info:  0.0  4.1    Net $auto$alumacc.cc:474:replace_alu$16007.C[5] budget 0.000000 ns (17,11) -> (17,11)
Info:                Sink $auto$alumacc.cc:474:replace_alu$16007.slice[5].carry$CARRY.CIN
Info:  0.2  4.3  Source $auto$alumacc.cc:474:replace_alu$16007.slice[5].carry$CARRY.COUT
Info:  0.0  4.3    Net $auto$alumacc.cc:474:replace_alu$16007.C[6] budget 0.000000 ns (17,11) -> (17,11)
Info:                Sink $auto$alumacc.cc:474:replace_alu$16007.slice[6].carry$CARRY.CIN
Info:  0.2  4.5  Source $auto$alumacc.cc:474:replace_alu$16007.slice[6].carry$CARRY.COUT
Info:  0.0  4.5    Net $auto$alumacc.cc:474:replace_alu$16007.C[7] budget 0.000000 ns (17,11) -> (17,11)
Info:                Sink $auto$alumacc.cc:474:replace_alu$16007.slice[7].carry$CARRY.CIN
Info:  0.2  4.7  Source $auto$alumacc.cc:474:replace_alu$16007.slice[7].carry$CARRY.COUT
Info:  0.3  5.0    Net $auto$alumacc.cc:474:replace_alu$16007.C[8] budget 0.290000 ns (17,11) -> (17,12)
Info:                Sink $auto$alumacc.cc:474:replace_alu$16007.slice[8].carry$CARRY.CIN
Info:  0.2  5.2  Source $auto$alumacc.cc:474:replace_alu$16007.slice[8].carry$CARRY.COUT
Info:  0.0  5.2    Net $auto$alumacc.cc:474:replace_alu$16007.C[9] budget 0.000000 ns (17,12) -> (17,12)
Info:                Sink $auto$alumacc.cc:474:replace_alu$16007.slice[9].carry$CARRY.CIN
Info:  0.2  5.3  Source $auto$alumacc.cc:474:replace_alu$16007.slice[9].carry$CARRY.COUT
Info:  0.0  5.3    Net $auto$alumacc.cc:474:replace_alu$16007.C[10] budget 0.000000 ns (17,12) -> (17,12)
Info:                Sink $auto$alumacc.cc:474:replace_alu$16007.slice[10].carry$CARRY.CIN
Info:  0.2  5.5  Source $auto$alumacc.cc:474:replace_alu$16007.slice[10].carry$CARRY.COUT
Info:  0.0  5.5    Net $auto$alumacc.cc:474:replace_alu$16007.C[11] budget 0.000000 ns (17,12) -> (17,12)
Info:                Sink $auto$alumacc.cc:474:replace_alu$16007.slice[11].carry$CARRY.CIN
Info:  0.2  5.7  Source $auto$alumacc.cc:474:replace_alu$16007.slice[11].carry$CARRY.COUT
Info:  0.0  5.7    Net $auto$alumacc.cc:474:replace_alu$16007.C[12] budget 0.000000 ns (17,12) -> (17,12)
Info:                Sink $auto$alumacc.cc:474:replace_alu$16007.slice[12].carry$CARRY.CIN
Info:  0.2  5.9  Source $auto$alumacc.cc:474:replace_alu$16007.slice[12].carry$CARRY.COUT
Info:  0.0  5.9    Net $auto$alumacc.cc:474:replace_alu$16007.C[13] budget 0.000000 ns (17,12) -> (17,12)
Info:                Sink $auto$alumacc.cc:474:replace_alu$16007.slice[13].carry$CARRY.CIN
Info:  0.2  6.1  Source $auto$alumacc.cc:474:replace_alu$16007.slice[13].carry$CARRY.COUT
Info:  0.0  6.1    Net $auto$alumacc.cc:474:replace_alu$16007.C[14] budget 0.000000 ns (17,12) -> (17,12)
Info:                Sink $auto$alumacc.cc:474:replace_alu$16007.slice[14].carry$CARRY.CIN
Info:  0.2  6.3  Source $auto$alumacc.cc:474:replace_alu$16007.slice[14].carry$CARRY.COUT
Info:  0.0  6.3    Net $auto$alumacc.cc:474:replace_alu$16007.C[15] budget 0.000000 ns (17,12) -> (17,12)
Info:                Sink $auto$alumacc.cc:474:replace_alu$16007.slice[15].carry$CARRY.CIN
Info:  0.2  6.5  Source $auto$alumacc.cc:474:replace_alu$16007.slice[15].carry$CARRY.COUT
Info:  0.3  6.7    Net $auto$alumacc.cc:474:replace_alu$16007.C[16] budget 0.290000 ns (17,12) -> (17,13)
Info:                Sink $auto$alumacc.cc:474:replace_alu$16007.slice[16].carry$CARRY.CIN
Info:  0.2  6.9  Source $auto$alumacc.cc:474:replace_alu$16007.slice[16].carry$CARRY.COUT
Info:  0.0  6.9    Net $auto$alumacc.cc:474:replace_alu$16007.C[17] budget 0.000000 ns (17,13) -> (17,13)
Info:                Sink $auto$alumacc.cc:474:replace_alu$16007.slice[17].carry$CARRY.CIN
Info:  0.2  7.1  Source $auto$alumacc.cc:474:replace_alu$16007.slice[17].carry$CARRY.COUT
Info:  0.0  7.1    Net $auto$alumacc.cc:474:replace_alu$16007.C[18] budget 0.000000 ns (17,13) -> (17,13)
Info:                Sink $auto$alumacc.cc:474:replace_alu$16007.slice[18].carry$CARRY.CIN
Info:  0.2  7.3  Source $auto$alumacc.cc:474:replace_alu$16007.slice[18].carry$CARRY.COUT
Info:  0.0  7.3    Net $auto$alumacc.cc:474:replace_alu$16007.C[19] budget 0.000000 ns (17,13) -> (17,13)
Info:                Sink $auto$alumacc.cc:474:replace_alu$16007.slice[19].carry$CARRY.CIN
Info:  0.2  7.5  Source $auto$alumacc.cc:474:replace_alu$16007.slice[19].carry$CARRY.COUT
Info:  0.0  7.5    Net $auto$alumacc.cc:474:replace_alu$16007.C[20] budget 0.000000 ns (17,13) -> (17,13)
Info:                Sink $auto$alumacc.cc:474:replace_alu$16007.slice[20].carry$CARRY.CIN
Info:  0.2  7.7  Source $auto$alumacc.cc:474:replace_alu$16007.slice[20].carry$CARRY.COUT
Info:  0.0  7.7    Net $auto$alumacc.cc:474:replace_alu$16007.C[21] budget 0.000000 ns (17,13) -> (17,13)
Info:                Sink $auto$alumacc.cc:474:replace_alu$16007.slice[21].carry$CARRY.CIN
Info:  0.2  7.9  Source $auto$alumacc.cc:474:replace_alu$16007.slice[21].carry$CARRY.COUT
Info:  0.0  7.9    Net $auto$alumacc.cc:474:replace_alu$16007.C[22] budget 0.000000 ns (17,13) -> (17,13)
Info:                Sink $auto$alumacc.cc:474:replace_alu$16007.slice[22].carry$CARRY.CIN
Info:  0.2  8.0  Source $auto$alumacc.cc:474:replace_alu$16007.slice[22].carry$CARRY.COUT
Info:  0.0  8.0    Net $auto$alumacc.cc:474:replace_alu$16007.C[23] budget 0.000000 ns (17,13) -> (17,13)
Info:                Sink $auto$alumacc.cc:474:replace_alu$16007.slice[23].carry$CARRY.CIN
Info:  0.2  8.2  Source $auto$alumacc.cc:474:replace_alu$16007.slice[23].carry$CARRY.COUT
Info:  0.7  8.9    Net $nextpnr_ICESTORM_LC_4$I3 budget 0.670000 ns (17,13) -> (17,14)
Info:                Sink $nextpnr_ICESTORM_LC_4.I3
Info:  0.5  9.4  Source $nextpnr_ICESTORM_LC_4.O
Info:  0.9 10.2    Net $abc$44715$auto$alumacc.cc:491:replace_alu$16009[23] budget 0.000000 ns (17,14) -> (16,13)
Info:                Sink $abc$44715$auto$blifparse.cc:492:parse_blif$45499_LC.I3
Info:  0.5 10.7  Source $abc$44715$auto$blifparse.cc:492:parse_blif$45499_LC.O
Info:  1.9 12.6    Net common.pb.uart.rx_mod.symclk.clks_per_sym_limited budget 0.000000 ns (16,13) -> (13,11)
Info:                Sink $nextpnr_ICESTORM_LC_26.I1
Info:  0.4 13.0  Source $nextpnr_ICESTORM_LC_26.COUT
Info:  0.0 13.0    Net $nextpnr_ICESTORM_LC_26$O budget 0.000000 ns (13,11) -> (13,11)
Info:                Sink $auto$alumacc.cc:474:replace_alu$16169.slice[1].carry$CARRY.CIN
Info:  0.2 13.1  Source $auto$alumacc.cc:474:replace_alu$16169.slice[1].carry$CARRY.COUT
Info:  0.4 13.5    Net $auto$alumacc.cc:474:replace_alu$16169.C[2] budget 0.380000 ns (13,11) -> (13,11)
Info:                Sink $auto$alumacc.cc:474:replace_alu$16169.slice[2].adder_LC.I3
Info:  0.5 14.0  Source $auto$alumacc.cc:474:replace_alu$16169.slice[2].adder_LC.O
Info:  2.3 16.3    Net $abc$44715$auto$alumacc.cc:474:replace_alu$15981.B_buf[2] budget 0.000000 ns (13,11) -> (21,11)
Info:                Sink $abc$44715$auto$blifparse.cc:492:parse_blif$45821_LC.I3
Info:  0.5 16.7  Source $abc$44715$auto$blifparse.cc:492:parse_blif$45821_LC.O
Info:  0.9 17.6    Net $abc$44715$auto$alumacc.cc:474:replace_alu$15981.BB[2] budget 0.000000 ns (21,11) -> (20,11)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[2].carry$CARRY.I2
Info:  0.3 17.9  Source $auto$alumacc.cc:474:replace_alu$15981.slice[2].carry$CARRY.COUT
Info:  0.0 17.9    Net $auto$alumacc.cc:474:replace_alu$15981.C[3] budget 0.000000 ns (20,11) -> (20,11)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[3].carry$CARRY.CIN
Info:  0.2 18.1  Source $auto$alumacc.cc:474:replace_alu$15981.slice[3].carry$CARRY.COUT
Info:  0.0 18.1    Net $auto$alumacc.cc:474:replace_alu$15981.C[4] budget 0.000000 ns (20,11) -> (20,11)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[4].carry$CARRY.CIN
Info:  0.2 18.3  Source $auto$alumacc.cc:474:replace_alu$15981.slice[4].carry$CARRY.COUT
Info:  0.0 18.3    Net $auto$alumacc.cc:474:replace_alu$15981.C[5] budget 0.000000 ns (20,11) -> (20,11)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[5].carry$CARRY.CIN
Info:  0.2 18.5  Source $auto$alumacc.cc:474:replace_alu$15981.slice[5].carry$CARRY.COUT
Info:  0.0 18.5    Net $auto$alumacc.cc:474:replace_alu$15981.C[6] budget 0.000000 ns (20,11) -> (20,11)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[6].carry$CARRY.CIN
Info:  0.2 18.7  Source $auto$alumacc.cc:474:replace_alu$15981.slice[6].carry$CARRY.COUT
Info:  0.0 18.7    Net $auto$alumacc.cc:474:replace_alu$15981.C[7] budget 0.000000 ns (20,11) -> (20,11)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[7].carry$CARRY.CIN
Info:  0.2 18.9  Source $auto$alumacc.cc:474:replace_alu$15981.slice[7].carry$CARRY.COUT
Info:  0.3 19.1    Net $auto$alumacc.cc:474:replace_alu$15981.C[8] budget 0.290000 ns (20,11) -> (20,12)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[8].carry$CARRY.CIN
Info:  0.2 19.3  Source $auto$alumacc.cc:474:replace_alu$15981.slice[8].carry$CARRY.COUT
Info:  0.0 19.3    Net $auto$alumacc.cc:474:replace_alu$15981.C[9] budget 0.000000 ns (20,12) -> (20,12)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[9].carry$CARRY.CIN
Info:  0.2 19.5  Source $auto$alumacc.cc:474:replace_alu$15981.slice[9].carry$CARRY.COUT
Info:  0.0 19.5    Net $auto$alumacc.cc:474:replace_alu$15981.C[10] budget 0.000000 ns (20,12) -> (20,12)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[10].carry$CARRY.CIN
Info:  0.2 19.7  Source $auto$alumacc.cc:474:replace_alu$15981.slice[10].carry$CARRY.COUT
Info:  0.0 19.7    Net $auto$alumacc.cc:474:replace_alu$15981.C[11] budget 0.000000 ns (20,12) -> (20,12)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[11].carry$CARRY.CIN
Info:  0.2 19.9  Source $auto$alumacc.cc:474:replace_alu$15981.slice[11].carry$CARRY.COUT
Info:  0.0 19.9    Net $auto$alumacc.cc:474:replace_alu$15981.C[12] budget 0.000000 ns (20,12) -> (20,12)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[12].carry$CARRY.CIN
Info:  0.2 20.1  Source $auto$alumacc.cc:474:replace_alu$15981.slice[12].carry$CARRY.COUT
Info:  0.0 20.1    Net $auto$alumacc.cc:474:replace_alu$15981.C[13] budget 0.000000 ns (20,12) -> (20,12)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[13].carry$CARRY.CIN
Info:  0.2 20.3  Source $auto$alumacc.cc:474:replace_alu$15981.slice[13].carry$CARRY.COUT
Info:  0.0 20.3    Net $auto$alumacc.cc:474:replace_alu$15981.C[14] budget 0.000000 ns (20,12) -> (20,12)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[14].carry$CARRY.CIN
Info:  0.2 20.5  Source $auto$alumacc.cc:474:replace_alu$15981.slice[14].carry$CARRY.COUT
Info:  0.0 20.5    Net $auto$alumacc.cc:474:replace_alu$15981.C[15] budget 0.000000 ns (20,12) -> (20,12)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[15].carry$CARRY.CIN
Info:  0.2 20.6  Source $auto$alumacc.cc:474:replace_alu$15981.slice[15].carry$CARRY.COUT
Info:  0.3 20.9    Net $auto$alumacc.cc:474:replace_alu$15981.C[16] budget 0.290000 ns (20,12) -> (20,13)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[16].carry$CARRY.CIN
Info:  0.2 21.1  Source $auto$alumacc.cc:474:replace_alu$15981.slice[16].carry$CARRY.COUT
Info:  0.0 21.1    Net $auto$alumacc.cc:474:replace_alu$15981.C[17] budget 0.000000 ns (20,13) -> (20,13)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[17].carry$CARRY.CIN
Info:  0.2 21.3  Source $auto$alumacc.cc:474:replace_alu$15981.slice[17].carry$CARRY.COUT
Info:  0.0 21.3    Net $auto$alumacc.cc:474:replace_alu$15981.C[18] budget 0.000000 ns (20,13) -> (20,13)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[18].carry$CARRY.CIN
Info:  0.2 21.5  Source $auto$alumacc.cc:474:replace_alu$15981.slice[18].carry$CARRY.COUT
Info:  0.0 21.5    Net $auto$alumacc.cc:474:replace_alu$15981.C[19] budget 0.000000 ns (20,13) -> (20,13)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[19].carry$CARRY.CIN
Info:  0.2 21.7  Source $auto$alumacc.cc:474:replace_alu$15981.slice[19].carry$CARRY.COUT
Info:  0.0 21.7    Net $auto$alumacc.cc:474:replace_alu$15981.C[20] budget 0.000000 ns (20,13) -> (20,13)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[20].carry$CARRY.CIN
Info:  0.2 21.9  Source $auto$alumacc.cc:474:replace_alu$15981.slice[20].carry$CARRY.COUT
Info:  0.0 21.9    Net $auto$alumacc.cc:474:replace_alu$15981.C[21] budget 0.000000 ns (20,13) -> (20,13)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[21].carry$CARRY.CIN
Info:  0.2 22.0  Source $auto$alumacc.cc:474:replace_alu$15981.slice[21].carry$CARRY.COUT
Info:  0.0 22.0    Net $auto$alumacc.cc:474:replace_alu$15981.C[22] budget 0.000000 ns (20,13) -> (20,13)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[22].carry$CARRY.CIN
Info:  0.2 22.2  Source $auto$alumacc.cc:474:replace_alu$15981.slice[22].carry$CARRY.COUT
Info:  0.0 22.2    Net $auto$alumacc.cc:474:replace_alu$15981.C[23] budget 0.000000 ns (20,13) -> (20,13)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[23].carry$CARRY.CIN
Info:  0.2 22.4  Source $auto$alumacc.cc:474:replace_alu$15981.slice[23].carry$CARRY.COUT
Info:  0.3 22.7    Net $auto$alumacc.cc:474:replace_alu$15981.C[24] budget 0.290000 ns (20,13) -> (20,14)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[24].carry$CARRY.CIN
Info:  0.2 22.9  Source $auto$alumacc.cc:474:replace_alu$15981.slice[24].carry$CARRY.COUT
Info:  0.0 22.9    Net $auto$alumacc.cc:474:replace_alu$15981.C[25] budget 0.000000 ns (20,14) -> (20,14)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[25].carry$CARRY.CIN
Info:  0.2 23.1  Source $auto$alumacc.cc:474:replace_alu$15981.slice[25].carry$CARRY.COUT
Info:  0.0 23.1    Net $auto$alumacc.cc:474:replace_alu$15981.C[26] budget 0.000000 ns (20,14) -> (20,14)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[26].carry$CARRY.CIN
Info:  0.2 23.3  Source $auto$alumacc.cc:474:replace_alu$15981.slice[26].carry$CARRY.COUT
Info:  0.0 23.3    Net $auto$alumacc.cc:474:replace_alu$15981.C[27] budget 0.000000 ns (20,14) -> (20,14)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[27].carry$CARRY.CIN
Info:  0.2 23.4  Source $auto$alumacc.cc:474:replace_alu$15981.slice[27].carry$CARRY.COUT
Info:  0.0 23.4    Net $auto$alumacc.cc:474:replace_alu$15981.C[28] budget 0.000000 ns (20,14) -> (20,14)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[28].carry$CARRY.CIN
Info:  0.2 23.6  Source $auto$alumacc.cc:474:replace_alu$15981.slice[28].carry$CARRY.COUT
Info:  0.0 23.6    Net $auto$alumacc.cc:474:replace_alu$15981.C[29] budget 0.000000 ns (20,14) -> (20,14)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[29].carry$CARRY.CIN
Info:  0.2 23.8  Source $auto$alumacc.cc:474:replace_alu$15981.slice[29].carry$CARRY.COUT
Info:  0.0 23.8    Net $auto$alumacc.cc:474:replace_alu$15981.C[30] budget 0.000000 ns (20,14) -> (20,14)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[30].carry$CARRY.CIN
Info:  0.2 24.0  Source $auto$alumacc.cc:474:replace_alu$15981.slice[30].carry$CARRY.COUT
Info:  0.0 24.0    Net $auto$alumacc.cc:474:replace_alu$15981.C[31] budget 0.000000 ns (20,14) -> (20,14)
Info:                Sink $auto$alumacc.cc:474:replace_alu$15981.slice[31].carry$CARRY.CIN
Info:  0.2 24.2  Source $auto$alumacc.cc:474:replace_alu$15981.slice[31].carry$CARRY.COUT
Info:  0.7 24.9    Net $nextpnr_ICESTORM_LC_30$I3 budget 0.670000 ns (20,14) -> (20,15)
Info:                Sink $nextpnr_ICESTORM_LC_30.I3
Info:  0.5 25.3  Source $nextpnr_ICESTORM_LC_30.O
Info:  2.9 28.2    Net $abc$44715$auto$alumacc.cc:491:replace_alu$15983[31] budget 12.708000 ns (20,15) -> (12,14)
Info:                Sink $abc$44715$auto$blifparse.cc:492:parse_blif$45872_LC.I0
Info:  0.7 28.9  Source $abc$44715$auto$blifparse.cc:492:parse_blif$45872_LC.O
Info:  0.9 29.7    Net $abc$44715$auto$rtlil.cc:1836:ReduceOr$15993_new_inv_ budget 4.600000 ns (12,14) -> (11,14)
Info:                Sink $abc$44715$auto$blifparse.cc:492:parse_blif$45391_LC.I3
Info:  0.5 30.2  Setup $abc$44715$auto$blifparse.cc:492:parse_blif$45391_LC.I3
Info: 15.7 ns logic, 14.5 ns routing

Info: Critical path report for cross-domain path '<async>' -> '<async>':
Info: curr total
Info:  0.0  0.0  Source PIN_13$sb_io.D_IN_0
Info:  0.9  0.9    Net PIN_13 budget 41.433998 ns (0,3) -> (1,3)
Info:                Sink $abc$44715$auto$blifparse.cc:492:parse_blif$45784_LC.I3
Info:  0.5  1.3  Source $abc$44715$auto$blifparse.cc:492:parse_blif$45784_LC.O
Info:  0.9  2.2    Net $abc$44715$auto$rtlil.cc:1832:Not$15840 budget 41.433998 ns (1,3) -> (0,3)
Info:                Sink PIN_10$sb_io.OUTPUT_ENABLE
Info: 0.5 ns logic, 1.7 ns routing

Info: Critical path report for cross-domain path '<async>' -> 'posedge pll_clk_out_$glb_clk':
Info: curr total
Info:  0.0  0.0  Source PIN_1$sb_io.D_IN_0
Info:  4.5  4.5    Net PIN_1 budget 11.263000 ns (4,33) -> (1,1)
Info:                Sink $abc$44715$auto$blifparse.cc:492:parse_blif$44718_LC.I3
Info:  0.5  4.9  Source $abc$44715$auto$blifparse.cc:492:parse_blif$44718_LC.O
Info:  4.0  9.0    Net n_reset budget 8.973000 ns (1,1) -> (20,21)
Info:                Sink $abc$44715$auto$blifparse.cc:492:parse_blif$44717_LC.I2
Info:  0.6  9.5  Source $abc$44715$auto$blifparse.cc:492:parse_blif$44717_LC.O
Info:  3.4 12.9    Net $abc$44715$auto$dff2dffe.cc:158:make_patterns_logic$29217 budget 9.298000 ns (20,21) -> (7,22)
Info:                Sink $abc$44715$auto$blifparse.cc:492:parse_blif$45106_LC.I2
Info:  0.6 13.4  Source $abc$44715$auto$blifparse.cc:492:parse_blif$45106_LC.O
Info:  0.9 14.3    Net $abc$44715$new_n1811_ budget 7.493000 ns (7,22) -> (7,22)
Info:                Sink $abc$44715$auto$blifparse.cc:492:parse_blif$45102_LC.I1
Info:  0.6 14.9  Source $abc$44715$auto$blifparse.cc:492:parse_blif$45102_LC.O
Info:  0.9 15.8    Net $abc$44715$new_n1807_ budget 7.307000 ns (7,22) -> (7,22)
Info:                Sink $abc$44715$auto$blifparse.cc:492:parse_blif$45111_LC.I3
Info:  0.5 16.2  Source $abc$44715$auto$blifparse.cc:492:parse_blif$45111_LC.O
Info:  0.9 17.1    Net $abc$44715$auto$dff2dffe.cc:175:make_patterns_logic$36014 budget 7.642000 ns (7,22) -> (7,23)
Info:                Sink $abc$44715$auto$blifparse.cc:492:parse_blif$45110_LC.I1
Info:  0.6 17.7  Source $abc$44715$auto$blifparse.cc:492:parse_blif$45110_LC.O
Info:  2.4 20.1    Net $abc$44715$auto$dff2dffe.cc:175:make_patterns_logic$36148 budget 7.937000 ns (7,23) -> (7,23)
Info:                Sink $abc$44715$auto$blifparse.cc:492:parse_blif$45252_LC.CEN
Info:  0.1 20.2  Setup $abc$44715$auto$blifparse.cc:492:parse_blif$45252_LC.CEN
Info: 3.3 ns logic, 16.8 ns routing

Info: Critical path report for cross-domain path 'posedge pll_clk_out_$glb_clk' -> '<async>':
Info: curr total
Info:  0.8  0.8  Source $auto$simplemap.cc:420:simplemap_dff$17394_DFFLC.O
Info:  1.4  2.2    Net common.pb.rx_buf_wr_addr[1] budget 7.200000 ns (6,18) -> (7,19)
Info:                Sink $abc$44715$auto$blifparse.cc:492:parse_blif$45096_LC.I1
Info:  0.6  2.8  Source $abc$44715$auto$blifparse.cc:492:parse_blif$45096_LC.O
Info:  0.9  3.7    Net $abc$44715$auto$simplemap.cc:127:simplemap_reduce$19527[0]_new_inv_ budget 7.094000 ns (7,19) -> (7,19)
Info:                Sink $abc$44715$auto$blifparse.cc:492:parse_blif$45092_LC.I0
Info:  0.7  4.3  Source $abc$44715$auto$blifparse.cc:492:parse_blif$45092_LC.O
Info:  4.5  8.8    Net $abc$44715$techmap\common.pb.$eq$profibus_phy_mod.v:990$6250_Y_new_ budget 17.709999 ns (7,19) -> (27,32)
Info:                Sink $abc$44715$auto$blifparse.cc:492:parse_blif$45687_LC.I2
Info:  0.6  9.3  Source $abc$44715$auto$blifparse.cc:492:parse_blif$45687_LC.O
Info:  0.9 10.2    Net PIN_20 budget 17.511000 ns (27,32) -> (28,33)
Info:                Sink PIN_20$sb_io.D_OUT_0
Info: 2.6 ns logic, 7.6 ns routing

Info: Max frequency for clock 'pll_clk_out_$glb_clk': 33.07 MHz (PASS at 12.00 MHz)

Info: Max delay <async>                      -> <async>                     : 2.20 ns
Info: Max delay <async>                      -> posedge pll_clk_out_$glb_clk: 20.17 ns
Info: Max delay posedge pll_clk_out_$glb_clk -> <async>                     : 10.21 ns

Info: Slack histogram:
Info:  legend: * represents 7 endpoint(s)
Info:          + represents [1,7) endpoint(s)
Info: [ 53093,  54517) |******+
Info: [ 54517,  55941) |***+
Info: [ 55941,  57365) |***+
Info: [ 57365,  58789) | 
Info: [ 58789,  60213) | 
Info: [ 60213,  61637) | 
Info: [ 61637,  63061) | 
Info: [ 63061,  64485) |+
Info: [ 64485,  65909) |***+
Info: [ 65909,  67333) |***+
Info: [ 67333,  68757) |************************************************************ 
Info: [ 68757,  70181) |*****************************+
Info: [ 70181,  71605) |**********+
Info: [ 71605,  73029) |**********************+
Info: [ 73029,  74453) |***************************+
Info: [ 74453,  75877) |**********************************************+
Info: [ 75877,  77301) |********************+
Info: [ 77301,  78725) |****************************+
Info: [ 78725,  80149) |*****************************+
Info: [ 80149,  81573) |***********************************************************+
